When I started to think about electronics, I didn't spare much thought for the wires. The ICs (integrated circuits), the diodes - they were interesting. But wires ? What could possibly be interesting about them ? And in any case, number of wires is pretty much determined by number of wired elements - something like one wire for each two pins. Anyway, it's boring, boring, boring.
So when I made design decisions for the TTL CPU, I had two criteria:
- Number of ICs
- Number of things that can go horribly wrong and fry the ICs
In retrospect, I should have thought about wires too. But let's start with a simple example - a register file read port.
A register file consists of some small amount of memory, and a few ports. There are two kinds of ports. Write ports, that let you write to the memory, and read ports that let you read from the memory. Most register files have 1 write port and 1-3 read ports. For simplicity, let's just design one read port for a straightforward register file.
First - the memory. It's pretty common to simply use 8 8-bit D flip-flops. The read port is going to get the number of port to be read as a 3 bit number.
This means the read port has 64 input wires from memory, 3 input wires for address, and 8 output wires for the data.
But first, some explanations.
A 2-input multiplexer is a device that gets 2 input wires, 1 select wire, and outputs to 1 wire. If select is high, it connects the first input to output. If select is low, it connects the second input to output. Multiplexers are very useful, so they also make ones that can handle more signals. A 4-input multiplexer has 4 input wires, 2 select wires, and 1 output wire. An 8-input multiplexer has 8 input wires, 3 select wires, and 1 output wire. These three are common. Bigger multiplexers or not-power-of-two multiplexers aren't made for practical reasons.
A three-state driver is a device that gets N input wires, 1 enable wire, and N output wires. If enable is high, input and output wires are connected (first input to first output, second to second and so on). If enable is low, input and output is simply disconnected. It's called "three-state" because its outputs can be low, high, or disconnected; not just low and high like in most ICs.
Probably the simplest way of building a read port is using 8 8-input multiplexers (74LS151), one for each input. Each of them gets 3 address wires, 8 input wires (one from each D flip flop), and is directly connected to 1 output wire. So total is 8 chips, 64 (input) + 24 (address) + 8 (output) = 96 wires. And nothing could possibly go wrong - no matter what values are on the wires, the design is not going to fry.
The alternative is based on three-state drivers. We put one 8-input three-state driver (74LS244) after each memory D flip flop chip, and connect all their outputs together to the bus. So first bit of the first driver, with first bit of the second driver, and so on, all go to the first bit of the bus. To convert 3-wire address to 8 enable signals for the drivers we need one more chip - a 3-to-8-decoder (74LS138). Together that's 64 (input) + 11 (address) + 64 (output) = 139 wires. And if for any reason two three-state drivers feel like going active at the same time, the whole box can simply fry.
So to sum it up:
Multiplexers | 3-state Drivers | |
ICs | 8 | 9 |
---|---|---|
Wires | 96 | 139 |
Safe | yes | no |
So by my reasoning, nobody who is even remotely sane would use three state drivers for a register file read port.
Let's include one more criterion to the equation - number of pairs of ICs that need to be connected. The address bus and the output bus are counted as devices here.
In multiplexer based solution, each multiplexer is connected to the address bus, 8 D flip-flops and the output bus. So number of connected device pairs is 80.
In three state driver based solution, each three state driver is connected to one D flip-flop, the 3-to-8 decoder, and the output bus. The 3-to-8 decoder is also connected to the address bus. So the total number of connected device pairs is only 25.
In other words, multiplexer-based register file read port is a wiring hell ! I'm more than willing to accept more ICs, more wires, and potential fry-safety issues, just to get decent wiring.
This post was about register files - a bigger, more complex, and more fryable design wins because of much simpler wiring. There's a strikingly similar situation with design of the blinkenlights, and that's the subject of my next post.
See also: part 1, part 2.
1 comment:
I just found this blog while I was geeking around for Ruby/Lisp stuff.
I don't particularly care for electronics (as a hobby anyway) but the programming and historical content is something else altogether.
Nice work sticking it to Slava Pestov. X-D
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